The present invention relates to an integrated circuit consisting of one or a plural number of electronic circuits integrated in one chip whose characteristics are dependent on the product of the value of a resistance and an electrostatic capacity of a capacitor.
Recently, as one of the means of promoting further compactness, reduction of weight and reduction of production cost of electronic equipment, the integration of the electronic circuits (IC) has been promoted. Nevertheless, there is an increasing demand for the further compactness of the integrated circuit through the integration of functionally different plural numbers of electronic circuits on a common substrate (IC chip).
The conventional electronic circuit, in many instances, consists of such parts as the filters, oscillators and pulse delay circuits which are formed with inductance, capacitance and resistance elements, respectively. The major drawbacks to obtaining further compactness, reduction of the weight and reduction of the production cost of the electronic circuit have been the difficulty of incorporating the inductor into the IC, relatively large dispersion of the values (the resistance and the electrostatic capacity) of resisters and capacitors incorporated into the IC due to the effect of the changes in the environmental condition such as the temperature, the need of using many external parts in incorporating the oscillator and the electronic circuit such as the pulse delay circuit into the IC and the need of the separate adjustments of the individual circuits.
For example, in the case of the portable VTR which attaches importance to maneuverability, the compactness and the reduction of the weight of the electronic circuit section through using the IC is one of the important requirements to be met. On the other hand, in the case of the desk-top type VTR, the reduction of the manufacturing cost is largely affected by the reduction in the number of the elements contained in an IC and the reduction of the number of the parts which require the adjustment. Meeting these requirements for the VTR are also restricted by the aforementioned reasons.
As an example of the means of reducing the number of the external parts, there is the incorporation of the filter into the IC. In this case, the use of the active filter consisting of a capacitor and a resistor can be considered instead of the inductor which is hard to be incorporated into the IC. For example, the twin-T circuit shown in FIG. 1 is generally known as the trap filter. In the case shown in FIG. 1, when the values of the resistor and the capacitors have the following value respectively, EQU R.sub.1 =R.sub.2 =2R.sub.3 =Ra EQU C.sub.1 =C.sub.2 =C.sub.3 /.sub.2 =Ca
the trap frequency fr can be expressed as follows: EQU fr=1/2.pi.CaRa
However, in FIG. 1, .nu..sub.i represents the input signal, and .nu..sub.o the output signal.
When the trap filter of said composition is incorporated into the IC, the dispersion of the characteristics becomes a problem, because the values of the resistors and the capacitors constituting the IC show dispersions due to the errors of the concentrations of the impurities of the semiconductors constituting the IC chip. For instance, the value of the resistors and the capacitors have such large dispersions as follows:
absolute value of resistor R.+-.10% PA1 absolute value of capacitor C.+-.10.about.15%
Thus, the trap frequency fr of the trap filter shown in FIG. 2 varies within the range of a indicated with the solid line and b indicated with the broken line, and even to the extent of .+-.20 to 25% in the worst case. Such dispersion has been the major drawback to the practical use of the trap filter.
As a countermeasure against this problem, a method for absorbing the dispersion by adjusting the value of the resistance by means of laser trimming on the IC chip has been disclosed in the Japanese Patent Publication No. 58083/1982, and this method has already been put to practical use. However, this method still has problems to be solved such as those concerning the accuracy and the yield rate.
Furthermore, the Japanese Patent Publication No. 36813/1977 and the U.S. Pat. No. 3,761,741 have proposed the variable attenuation circuit utilizing the fact that the resistance of the emitter of the transistor can be varied by the direct current. Also, it is known that the variation of the characteristic of the filter due to the dispersion of the absolute value of the element in the IC chip can be adjusted by a method similar to the above-mentioned method. It should be noted, however, that said technique is not always applicable to all kinds of the filter. For example, this technique is hard to apply to a trap filter consisting of the resistors R.sub.1, R.sub.2 and R.sub.3 as is shown in FIG. 1. Thus, in the case of such filter, the dispersion of the values of the elements in the IC chip has to be absorbed through adjustment from outside, and this gives rise to problems such as the increase in the production cost.
The incorporation of an oscillator into the IC is relatively advanced, but the oscillator in this form still requires the adjustment, and this causes some problems concerning its reliability and production cost.
These problems will be discussed taking the example of the ring oscillator shown in FIG. 3. In this case, the transistors 1 and 2, the transistors 3 and 4 and the transistors 5 and 6 constitute inverters, respectively. On the other hand, the transistors 1, 3 and 5 respectively constitute a current mirror together with the transistor 7. Thus, the collector currents of the transistors 1, 3 and 5 are respectively equal to the collector current of the transistor 7. Furthermore, the voltage between the base and the emitter of the transistor 8 is equal to those of the transistors 9 and 10. When this voltage is given as V.sub.BE, the base potential of the base of the transistor 8 is 2V.sub.BE, so that the emitter potential of the same is V.sub.BE. This emitter voltage V.sub.BE is applied to the external resistor 11 of the IC. When the resistance of said external resistor 11 is given as R, the current I shown in FIG. 3 can be expressed as EQU I=V.sub.BE /R (1)
The capacitors 12, 13 and 14 are respectively charged by the collector current I of the transistors 1, 3 and 5, and said capacitors and discharged when the transistors 6, 2 and 4 are set to ON. The charging and the discharging of these capacitors 12, 13 and 14 cause the ON and OFF of the transistors 2, 4 and 6, and this causes the pulse to be transmitted to the points a, b and c. The transmission of the pulse to these points, however, is delayed by a certain period of time by the capacitors 12, 13 and 14. The inverter has an odd number of stages, so that when the pulse has made a round from the point a to the point a by way of the points b and c, the positive feedback will be made due to the delay of the time in the inverter, whereby the oscillation occurs, and a series of the pulse will be obtained at the output terminal 15.
The action of said oscillator will be explained in further detail using the signal wave forms (a), (b) and (c) shown in FIG. 4 at the points a, b and c respectively shown in FIG. 3.
When the capacitor 12 is being charged by the collector current I of the transistor 1 while the transistor 2 is OFF, the capacitor 13 is kept fully charged while the transistor 4 is ON, and thus the capacitor 14 is kept charged while the transistor 6 is OFF. When the capacitor 12 is fully charged, the transistor 2 will turned on, and the capacitor 13 will be discharged through the transistor 2, whereby the transistor 4 is turned off, and the charging will be started by the collector current I of the transistor 5.
When the transistor 6 is turned on following the full charge of the capacitor 14, the capacitor 12 will be discharged by way of the transistor 6. Then, the transistor 2 will be off, and the capacitor 13 will start to be charged by the collector current I of the transistor 3.
In this way, the transistors 2, 6, 4 and 2 will be turned on repeatedly in this order, and the periodical change of the level of the point a can be obtained as a series of pulses at the output terminal 15.
The potential between the base and the emitter of the transistors 2, 4 and 6 is also V.sub.BE, and when the electrostatic capacities of the capacitors 12, 13 and 14 are set equal to each other, the times required until the transistors 2, 4 and 6 are turned on from the start of the charging of the capacitors 12, 13 and 14 are equal to each other, and also equal to the time required for the charging of the capacitors 12, 13 and 14 before the potentials of the bases of the transistors 2, 4 and 6 (the potentials at the points a, b and c) reach V.sub.BE from zero. Thus, when the electrostatic capacities of the capacitors 12, 13 and 14 are given as C, the time t.sub.0 required for the charging of these capacitors can be expressed as follows: EQU t.sub.0 =C.multidot.V.sub.BE /I (2)
Thus, the oscillation frequency T.sub.0 of this oscillator can be given as EQU T.sub.0 =3t.sub.0 ( 3)
Therefore, from the above Eqs. (1) through (3), the oscillation frequency f.sub.0 can be expressed as follows: EQU f.sub.0 =1/T.sub.0 =1/3CR (4)
As stated previously, the absolute value of the capacitor in the IC chip disperses as much as .+-.10 to 15%. As a result, the oscillation frequency f.sub.0 also disperses largely, but this dispersion is absorbed by adjusting the resistance R of the external resistor 11.
As explained in the foregoing, even when it has become possible to incorporate the filter or the oscillator into the IC, the adjustment for absorbing the resistance in the IC chip and the dispersion of the value of the capacitor will be required. Thus, in the case of the conventional integrated circuit, the means of the adjustment is indispensable. The manufacturing method relying on such adjustment, however, is not only time-consuming but also has problems to be solved as to the accuracy of the adjustment and the yield rate.